Datasheet
SLLS363A − SEPTEMBER 1999 − REVISED NOVEMBER 2000
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
The port status page provides access to configuration and status information for each of the ports. The port is
selected by writing 0 to the Page_Select field and the desired port number to the Port_Select field in base
register 7. The configuration of the port status page registers is shown in Table 3 and corresponding field
descriptions given in Table 4. If the selected port is unimplemented, all registers in the port status page are read
as 0.
Table 3. Page 0 (Port Status) Register Configuration
ADDRESS
BIT POSITION
ADDRESS
0 1 2 3 4 5 6 7
1000 AStat Bstat Ch Con Bias Dis
1001 Peer_Speed PIE Fault Reserved
1010 Reserved
1011 Reserved
1100 Reserved
1101 Reserved
1110 Reserved
1111 Reserved
Table 4. Page 0 (Port Status) Register Field Descriptions
FIELD SIZE TYPE DESCRIPTION
AStat 2 Rd TPA line state. This field indicates the TPA line state of the selected port, encoded as follows:
Code Line State
11 Z
01 1
10 0
00 invalid
Bstat 2 Rd TPB line state. This field indicates the TPB line state of the selected port. This field has the same encoding as
the ASTAT field.
Ch 1 Rd Child/parent status. A 1 indicates that the selected port is a child port. A 0 indicates that the selected port is the
parent port. A disconnected, disabled, or suspended port is reported as a child port. The Ch bit is invalid after a
bus−reset until tree-ID has completed.
Con 1 Rd Debounced port connection status. This bit indicates that the selected port is connected. The connection must
be stable for the debounce time of approximately 341 ms for the con bit to be set to 1. The con bit is reset to 0 by
hardware reset and is unaffected by bus-reset.
NOTE: The con bit indicates that the port is physically connected to a peer PHY, but the port is not necessarily
active.
Bias 1 Rd Debounced incoming cable bias status. A 1 indicates that the selected port is detecting incoming cable bias.
The incoming cable bias must be stable for the debounce time of 52 µs for the bias bit to be set to 1.
Dis 1 Rd/Wr Port disabled control. If 1, the selected port is disabled. The dis bit is reset to 0 by hardware reset (all ports are
enabled for normal operation following hardware reset). The dis bit is not affected by bus-reset.
Peer_Speed 3 Rd Port peer speed. This field indicates the highest speed capability of the peer PHY connected to the selected
port, encoded as follows:
Code Peer Speed
000 S100
001 S200
010 S400
011–111 invalid
The Peer_Speed field is invalid after a bus-reset until self-ID has completed.
NOTE: Peer speed codes higher than 010b (S400) are defined in P1394a. However, the TSB41LV06A is only
capable of detecting peer speeds up to S400.