Datasheet
SLLS423I − JUNE 2000 − REVISED MARCH 2005
55
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
PRINCIPLES OF OPERATION
interface reset and disable (continued)
The sequence of events for resetting the PHY-LLC interface when it is in the nondifferentiated mode of operation
(ISO
terminal is high) is as follows:
1. Normal operation. Interface is operating normally, with LPS asserted, SYSCLK active, status and packet
data reception and transmission via the CTL and D lines, and request activity via the LREQ line. In
Figure 28, the LPS signal is shown as a nonpulsed level signal. However, it is permissible to use a pulsed
signal for LPS in a direct connection between the PHY and LLC; a pulsed signal is required when using an
isolation barrier (whether of the TI bus-holder type or Annex J type).
2. LPS deasserted. The LLC deasserts the LPS signal and, within 1 µs, terminates any request or interface
bus activity, places its CTL and D outputs into a high-impedance state, and drives its LREQ output low.
3. Interface reset. After T
LPS_RESET
time, the PHY determines that LPS is inactive, terminates any interface
bus activity, and drives its CTL and D outputs low. The PHY-LLC interface is now in the reset state.
4. Interface restored. After the minimum T
RESTORE
time, the LLC may again assert LPS active. When LPS
is asserted, the interface is initialized.
If the LLC continues to keep the LPS signal deasserted, it requests that the interface be disabled. The PHY
disables the interface when LPS has been deasserted for T
LPS_DISABLE
. When the interface is disabled, the
PHY sets its CTL and D outputs as stated above for interface reset, but also stops SYSCLK activity. The
interface is also placed into the disabled condition upon a hardware reset of the PHY. The timing for interface
disable is shown in Figure 29 and Figure 30.
When the interface is disabled, the PHY enters a low-power state if none of its ports is active.
LPS
CTL0, CTL1
LREQ
SYSCLK
(3)
(2)
(1)
D0−D7
(low)
(4)
T
LPSL
T
LPSH
T
LPS_RESET
T
LPS_DISABLE
ISO
Figure 29. Interface Disable, ISO Low