Datasheet

Data-Mover Port Interface

SGLS139B − October 2003 − Revised April 2004TSB12LV32-EP

5.1.3.2 Asynchronous Packet Receive With Headers and Trailer

Step 1: Asynchronous packet is received through the receiver logic of the link core.

Step 2: The header quadlets are loaded into their respective header registers and routed to the DM port

without any buffering.

Step 3: Packet data is routed directly to the DM port (no buffering performed).

Step 4: Trailer quadlet is loaded into the trailer register at 48h and routed to the DM port.

CFR REGISTER

Step 1

Header0 Register at 38h

Trailer Register at 48h

LINK CORE

Transmitter

Receiver

Quadlet#0

Packet Received From

1394 Bus Through the Phy

Header1 Register at 3Ch

Quadlet#1

Header2 Register at 40h

Quadlet#2

Header3 Register at 42h

Quadlet#3

Loaded Only in

Block Receive

Data-

Mover

Port

Step 4 (Trailer Quadlet)

Step 3 (Packet Data)

Step 2 (Header Quadlet)

Step 4

Step 2

Figure 5−10. Asynchronous Receive With Headers and Trailer

5.1.4 Asynchronous Transmit

There are two ways (modes of operation) to transmit asynchronous data through the data mover:

• Asynchronous packet transmit with automatic header insertion

• Asynchronous packet transmit without automatic header insertion

The difference between the two modes is in the mechanism with which the header information is inserted into

the data stream. However, in both cases, the header information is always loaded into the link core transmitter

from the header registers starting with the CFR at 38h. There are no trailers for transmitted packets.