Datasheet

Microcontroller Interface
33
SGLS139B − October 2003 − Revised April 2004 TSB12LV32-EP
COLDFIRE
BCLK
MWR
MCS
MCA
MA[0:6]
MD[0:7]
MD[8:15]
A0
D0
A1
D2 D4 D6 D8 D10 D12 D14 D16 D18 D20 D22 D24
A2
D1 D3 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D25
M8BIT/SIZ0
MCMODE/SIZ1
Figure 3−10. Word Fixed-Timing Write
3.3.2.1 GRF READ in Fixed-Timing Mode
The timing requirements when performing a GRF read access in fixed-timing mode are different from timing
requirements of a CFR read access in the fixed-timing mode. In fixed-timing mode, the GRF must be accessed
only on a quadlet boundary. In other words, only quadlet fetches are legal. If the microinterface is configured
for a byte access, this means that MCS
must be asserted low for 4 BCLK cycles, as shown in Figure 3−11.
If configured for word access, then MCS
must only be asserted for 2 BCLK cycles, as shown in Figure 3−12.
After MCA
is driven high, another read or write transaction can begin after the next rising edge of BCLK.