Datasheet

Microcontroller Interface
28
SGLS139B − October 2003 − Revised April 2004TSB12LV32-EP
A0 A1 A2 A3
D2 D3D1D0
BCLK
MWR
MCS
MCA
MA[0:6]
MD[0:7]
MD[8:15]
COLDFIRE
M8BIT/SIZ0
MCMODE/SIZ1
Figure 3−3. Byte Handshake Read
Figure 3−4 shows a word handshake read transaction. In this case, all 16 bits of the MD lines are used. Note
that MD[0] contains the MSB and MD[15] contains the LSB. As in the byte read case, after MCA
is asserted
high another read or write transaction can begin after the next rising edge of BCLK.
BCLK
MWR
MCS
MCA
MA[0:6]
MD[0:7]
MD[8:15]
A0 A1 A3
D5 D7
D6D4
D3
D2D0
D1
COLDFIRE
M8BIT/SIZ0
MCMODE/SIZ1
A2
Figure 3−4. Word Handshake Read