Datasheet

Microcontroller Interface
27
SGLS139B − October 2003 − Revised April 2004 TSB12LV32-EP
3.2 Microcontroller Byte Unstack (Read) Operation
The microcontroller byte unstack (read) protocol is shown in Figure 3−2.
TSB12LV32 Read
Yes
Microcontroller
Reads Same Quadlet
As Before
Microcontroller
Reads Same
Byte/Doublet As Before
TSB12LV32
Provides Updated
Byte/Doublet Data
TSB12LV32
Provides Held
Byte/Doublet Data
TSB12LV32
Provides Updated
Byte/Doublet Data
Yes No
Yes No
No
Figure 3−2. Microcontroller Byte Unstack (Read) Operation
3.3 Microcontroller Interface Read/Write Timing
The microcontroller interface can be configured to operate in one of the following modes: handshake,
fixed-timing, or ColdFire mode. Burst transfers are only supported in the latter two modes.
3.3.1 Microcontroller Handshake Mode
Byte handshake read and word handshake read are shown in Figure 3−3 and Figure 3−4, respectively.
The signal timing sequence for a handshake read transaction can be summarized as follows:
1. The host takes MCS
low to signal the start of access. When the rising edge of BCLK samples MCS low
and MWR
high, the MD[0:15] lines are enabled and driven with the read value. For an 8-bit data bus, the
MD[0:7] lines are not used.
2. Following the next rising edge of BCLK, the TSB12LV32 takes MCA
low to signal that the requested
operation is complete. This takes place after two BCLK cycles. MCA
remains low with the MD lines
containing valid read data until the microcontroller interface releases MCS
(high state)
3. The host takes MCS
high to signal the end of the process.
4. The TSB12LV32 holds MCA
low until MCS is sampled high, then MCA is set high to acknowledge the end
of the access. The MD lines are not put in the high-impedance state until after MCA
is taken high.
After MCA
is asserted high, another read or write transaction can begin after the next rising edge of BCLK.
Note that data size is determined by the M8BIT/SIZ0 signal, it is asserted high to select byte mode in
Figure 3−3 and asserted low to select word mode in Figure 3−4. The MCMODE/SIZ1 signal determines if the
microcontroller is operating in handshake mode or fixed timing mode; it is asserted high to select handshake
mode. The COLDFIRE signal is only asserted high when the microcontroller interface is operating in ColdFire
mode.