Datasheet

1–3
1.2 Terminal Assignments
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
GND
DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 DATA22 DATA23
GND
DATA24 DATA25 DATA26 DATA27 DATA28 DATA29 DATA30 DATA31
GND
ADDR0 ADDR1 ADDR2 ADDR3
Reserved MTEST2 MTEST1 MTEST0 GND GND LREQ GND SCLK CTL0 CTL1 GND D0 D1 D2 D3 D4 D5 D6 D7 GND
CYST/GPO2
CYDNE/GPO1
GRFEMP/GPO0
GND
GND
GND
CYCLEOUT
V
CC
CYCLEIN
GND
GND
RESET
GND
INT
WR
CA
CS
V
CC
+5V
BCLK
GND
ADDR7
ADDR6
ADDR5
ADDR4
V
CC
POWERON
MTEST3
GND
GND
GND
GND
DATA0
DATA1
DATA2
DATA3
V
CC
+5V
DATA4
DATA5
DATA6
DATA7
GND
DATA8
DATA9
DATA10
DATA11
V
CC
DATA12
DATA13
DATA14
DATA15
V
CC
V V
CC CC
To Host
To PHY Layer
NOTES: A. Tie reserved terminals to GND.
TSB12LV01B
PZ PACKAGE
(TOP VIEW)
B. Bit 0 is the most significant bit (MSB).
V
CC
+5V
V
CC
+5V
V
CC