Datasheet

1–5
Table 1–1.Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
PHY Interface
CTL1, CTL0 62,63 I/O PHY-link interface control bus. CTL1 and CTL0 indicate the four
operations that can occur on this interface (see Section 7 of this
document or Annex J of the IEEE 1394-1995 standard for more
information about the four operations).
D0 – D7 60-57
55
-52
I/O PHY-link interface data bus. Data is expected on D0 – D1 for 100
Mbits/s packets, D0 – D3 for 200 Mbits/s, and D0 – D7 for 400 Mbits/s.
LREQ 67 O Link request to PHY. LREQ is a TSB12LV01B output that makes bus
requests and register access requests to the PHY.
POWERON 76 O Power on indicator to PHY interface. When active, POWERON has a
clock output with 1/32 of the BCLK frequency and indicates to the PHY
interface that the TSB12LV01B is powered up. This terminal can be
connected to the link power status (LPS) terminal on the TI PHY
devices to provide an indication of the LLC power condition.
SCLK 65 I System clock. SCLK is a 49.152-MHz clock from the PHY. SCLK is
used to generate the 24.576
-MHz clock.
Miscellaneous Signals
BCLK 32 I Host bus clock. BCLK is the clock input supplied by the host to the
TSB12LV01B. BCLK is asynchronous to the PHY SCLK and supports
a maximum frequency of 50 MHz.
CYCLEIN 42 I Cycle in. CYCLEIN is an optional external 8,000-Hz clock used as the
cycle clock and should only be used when attached to the
cycle-master node. It is enabled by the cycle source bit and should be
tied high when not used. A pulsed input with a minimum pulse width of
80 ns may be used for CYCLEIN.
CYCLEOUT 44 O Cycle out. CYCLEOUT is the TSB12LV01B version of the cycle clock.
It is based on the timer controls and received cycle-start messages.
GRFEMP/GPO0 48 O GRF Empty bit / general-purpose output 0. The power up default
function for this terminal is GRFEMP. GRFEMP is asserted (high) for
as long as the GRFEMP bit (bit 0 @3Ch) is set. After power up, this
terminal may be programmed as a general-purpose output.
CYDNE/GPO1 49 O CYDNE status bit / general purpose output 1. The power up default
function for this terminal is CYDNE. CYDNE indicates the value of the
cycle done (CyDne) bit of the interrupt register. It remains asserted
(high) for as long as the interrupt bit is assigned. After power up, this
terminal may be programmed as a general-purpose output.
CYST/GPO2 50 O CYST status bit / general-purpose output 2. The power up default
function for this terminal is CYST. CYST indicates the value of the
cycle start (CySt) bit of the interrupt register. It remains asserted (high)
for as long as the interrupt bit is assigned. After power up, this terminal
may be programmed as a general-purpose output.
GND 1, 11, 21, 31,
38, 40, 41,
45–47, 51, 61,
66, 68, 70,
78–81, 91
Ground reference