Datasheet
TS5A3160
SCDS216C –OCTOBER 2005–REVISED MARCH 2012
www.ti.com
ELECTRICAL CHARACTERISTICS FOR 3.3-V SUPPLY
(1)
V
+
= 3 V to 3.6 V, T
A
= –40°C to 85°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS T
A
V
+
MIN TYP MAX UNIT
Analog Switch
Analog signal
V
COM
, V
NC
, V
NO
0 V
+
V
range
25°C 1.3 1.6
Peak ON 0 ≤ (V
NO
or V
NC
) ≤ V
+
, Switch ON,
r
peak
3 V Ω
resistance I
COM
= –100 mA, See Figure 13
Full 2
25°C 1.2 1.5
ON-state V
NO
or V
NC
= 2 V, Switch ON,
r
on
3 V Ω
resistance I
COM
= –100 mA, See Figure 13
Full 1.7
ON-state 25°C 0.1 0.15
resistance
V
NO
or V
NC
= 2 V, 0.8 V, Switch ON,
match Δr
on
3 V Ω
I
COM
= –100 mA, See Figure 13
Full 0.15
between
channels
0 ≤ (V
NO
or V
NC
) ≤ V
+
, Switch ON,
25°C 0.2
ON-state
I
COM
= –100 mA, See Figure 13
resistance r
on(flat)
3 V Ω
25°C 0.15 0.3
V
NO
or V
NC
= 2 V, 0.8 V, Switch ON,
flatness
I
COM
= –100 mA, See Figure 13
Full 0.3
V
NC
or V
NO
= 1 V, 25°C –20 2 20
V
COM
= 3 V,
I
NC(OFF)
, Switch OFF,
or 3.6 V nA
NC, NO
I
NO(OFF)
See Figure 14
Full –50 50
V
NC
or V
NO
= 3 V,
OFF leakage
V
COM
= 1 V,
current
25°C –1 0.2 1
I
NC(PWROFF)
, V
NC
or V
NO
= 0 to 3.6 V, Switch OFF,
0 V μA
I
NO(PWROFF)
V
COM
= 3.6 V to 0, See Figure 14
Full –15 15
V
NC
or V
NO
= 1 V, 25°C –10 2 10
NC, NO V
COM
= Open,
I
NC(ON)
, Switch ON,
ON leakage or 3.6 V nA
I
NO(ON)
See Figure 15
Full –20 20
current V
NC
or V
NO
= 3 V,
V
COM
= Open,
COM 25°C –1 0.2 1
V
COM
= 0 to 3.6 V, Switch OFF,
OFF leakage I
COM(PWROFF)
0 V μA
V
NC
or V
NO
= 3.6 V to 0, See Figure 14
Full –15 15
current
V
COM
= 1 V, 25°C –10 2 10
COM V
NC
or V
NO
= Open,
Switch ON,
ON leakage I
COM(ON)
or 3.6 V nA
See Figure 15
Full –20 20
current V
COM
= 3 V,
V
NC
or V
NO
= Open,
Digital Control Input (IN)
(2)
Input logic high V
IH
Full 2 5.5 V
Input logic low V
IL
Full 0 0.8 V
25°C –2 2
Input leakage
I
IH
, I
IL
V
I
= 5.5 V or 0 3.6 V nA
current
Full –100 100
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at V
+
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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