Datasheet
TS5A3160
SCDS216C –OCTOBER 2005–REVISED MARCH 2012
www.ti.com
ELECTRICAL CHARACTERISTICS FOR 5-V SUPPLY
(1)
V
+
= 4.5 V to 5.5 V, T
A
= –40°C to 85°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS T
A
V
+
MIN TYP MAX UNIT
Analog Switch
Analog signal V
COM
, V
NC
,
0 V
+
V
range V
NO
25°C 0.8 1.1
Peak ON 0 ≤ (V
NO
or V
NC
) ≤ V
+
, Switch ON,
r
peak
4.5 V Ω
resistance I
COM
= –100 mA, See Figure 13
Full 1.5
25°C 0.7 0.9
ON-state V
NO
or V
NC
= 2.5 V, Switch ON,
r
on
4.5 V Ω
resistance I
COM
= –100 mA, See Figure 13
Full 1.1
ON-state 25°C 0.05 0.1
resistance
V
NO
or V
NC
= 2.5 V, Switch ON,
match Δr
on
4.5 V Ω
I
COM
= –100 mA, See Figure 13
Full 0.1
between
channels
0 ≤ (V
NO
or V
NC
) ≤ V
+
, Switch ON,
25°C 0.15
I
COM
= –100 mA, See Figure 13
ON-state
resistance r
on(flat)
4.5 V Ω
V
NO
or V
NC
= 1 V, 1.5 V, 25°C 0.1 0.25
Switch ON,
flatness
2.5 V,
See Figure 13
Full 0.25
I
COM
= –100 mA,
V
NC
or V
NO
= 1 V, 25°C –20 2 20
I
NC(OFF)
, V
COM
= 4.5 V, Switch OFF,
5.5 V nA
NC, NO
I
NO(OFF)
or See Figure 14
Full –100 100
OFF leakage
V
NO
= 4.5 V, V
COM
= 1 V,
current
25°C –1 0.2 1
I
NC(PWROFF)
, V
NC
or V
NO
= 0 to 5.5 V, Switch OFF,
0 V μA
I
NO(PWROFF)
V
COM
= 5.5 V to 0, See Figure 14
Full –20 20
NC, NO 25°C –20 2 20
I
NC(ON)
, V
NC
or V
NO
= 0 to V
+
, Switch ON,
ON leakage 5.5 V nA
I
NO(ON)
V
COM
= Open, See Figure 15
Full –100 100
current
COM 25°C –1 0.1 1
V
COM
= 0 to 5.5 V, Switch OFF,
OFF leakage I
COM(PWROFF)
0 V μA
V
NC
or V
NO
= 5.5 V to 0, See Figure 14
Full –20 20
current
V
COM
= 1 V, 25°C –20 2 20
COM V
NC
or V
NO
= Open,
Switch ON,
ON leakage I
COM(ON)
or 5.5 V nA
See Figure 15
Full –100 100
current V
COM
= 4.5 V,
V
NC
or V
NO
= Open,
Digital Control Input (IN)
(2)
Input logic V
IH
Full 2.4 5.5
V
high
Input logic low V
IL
Full 0 0.8 V
25°C –2 0.2
Input leakage
I
IH
, I
IL
V
I
= 5.5 V or 0 5.5 V μA
current
Full 100 100
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at V
+
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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