Datasheet
TS5A23167
www.ti.com
SCDS195A –MAY 2005–REVISED SEPTEMBER 2012
Electrical Characteristics for 2.5-V Supply
(1)
V
+
= 2.3 V to 2.7 V, T
A
= –40°C to 85°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS T
A
V
+
MIN TYP MAX UNIT
Analog Switch
V
COM
,
Analog signal range 2.3 V 0 V
+
V
V
NC
25°C 1.8 2.4
0 ≤ V
NC
≤ V
+
, Switch ON,
Peak ON resistance r
peak
2.3 V Ω
I
COM
= –100 mA, See Figure 13
Full 2.6
25°C 1.2 2.1
V
NC
= 2 V, Switch ON,
ON-state resistance r
on
2.3 V Ω
I
COM
= –100 mA, See Figure 13
Full 2.4
ON-state resistance 25°C 0.04 0.15
V
NC
= 2 V, 0.8 V, Switch ON,
match between Δr
on
2.3 V Ω
I
COM
= –100 mA, See Figure 13
Full 0.15
channels
0 ≤ V
NC
≤ V
+
, Switch ON,
25°C 0.7
I
COM
= –100 mA, See Figure 13
ON-state resistance
r
on(flat)
2.3 V Ω
flatness 25°C 0.4 0.6
V
NC
= 2 V, 0.8 V, Switch ON,
I
COM
= –100 mA, See Figure 13
Full 0.6
V
NC
= 1 V, 25°C –5 0.3 5
V
COM
= 3 V,
Switch OFF,
I
NC(OFF)
or 2.7 V nA
See Figure 14
Full –50 50
NC
V
NC
= 3 V,
OFF leakage current
V
COM
= 1 V,
25°C –2 0.05 2
V
NC
= 0 to 3.6 V, Switch OFF,
I
NC(PWROFF)
0 V μA
V
COM
= 3.6 V to 0, See Figure 14
Full –15 15
V
COM
= 1 V, 25°C –5 0.3 5
V
NC
= 3 V,
Switch OFF,
I
COM(OFF)
or 2.7 V nA
See Figure 14
Full –50 50
COM
V
COM
= 3 V,
OFF leakage current
V
NC
= 1 V,
25°C –2 0.05 2
V
COM
= 0 to 3.6 V, Switch OFF,
I
COM(PWROFF)
0 V μA
V
NC
= 3.6 V to 0, See Figure 14
Full –15 15
V
NC
= 1 V, 25°C –2 0.3 2
V
COM
= Open,
NC Switch ON,
I
NC(ON)
or 2.7 V nA
ON leakage current See Figure 15
Full –20 20
V
NC
= 3 V,
V
COM
= Open,
V
COM
= 1 V, 25°C –2 0.3 2
V
NC
= Open,
COM Switch ON,
I
COM(ON)
or 2.7 V nA
ON leakage current See Figure 15
Full –20 20
V
COM
= 3 V,
V
NC
= Open,
Digital Control Inputs (IN1, IN2)
(2)
Input logic high V
IH
Full 1.8 5.5 V
Input logic low V
IL
Full 0 0.6 V
25°C –2 0.3 2
Input leakage current I
IH
, I
IL
V
I
= 5.5 V or 0 2.7 V nA
Full –20 20
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at V
+
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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