Datasheet

www.ti.com
PARAMETER MEASUREMENT INFORMATION
C
L
(see Note A)
TEST CIRCUIT
S1
2 × V
DD
Open
GND
R
L
R
L
V
OH
V
OL
VOLTAGE WAVEFORMS
OUTPUT SKEW [t
sk(o)
]
Data Out at
YB
1
or YB
2
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z
O
= 50 Ω, t
r
≤ 2.5 ns, t
f
≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
50 Ω
V
G1
V
DD
DUT
50 Ω
V
IN
50 Ω
V
G2
50 Ω
V
I
TEST
R
L
S1 C
L
3.3 V ± 0.3 V
V
DD
V
I
t
sk(p)
t
sk(o)
3.3 V ± 0.3 V
Open
Open
200 Ω
200 Ω
V
DD
or GND
V
DD
or GND
10 pF
10 pF
Input Generator
Input Generator
V
O
(V
OH
+ V
OL
)/2
V
OH
V
OL
Data Out at
XB
1
or XB
2
(V
OH
+ V
OL
)/2
3.5 V
1.5 V
Data In at
Ax or Ay
2.5 V
t
PLHx
t
PHLx
t
sk(o)
t
sk(o)
t
PLHy
t
PHLy
t
sk(o)
= t
PLHy
− t
PLHx
 or t
PHLy
− t
PHLx

V
OH
V
OL
VOLTAGE WAVEFORMS
PULSE SKEW [t
sk(p)
]
Output
(V
OH
+ V
OL
)/2
Input
2.5 V
t
PLH
t
PHL
t
sk(p)
= t
PLH
− t
PLH

3.5 V
1.5 V
TS3L301
16-BIT TO 8-BIT SPDT GIGABIT LAN SWITCH
WITH LOW AND FLAT ON-STATE RESISTANCE
SCDS178C – NOVEMBER 2004 – REVISED APRIL 2006
(Skew)
Figure 5. Test Circuit and Voltage Waveforms
9
Submit Documentation Feedback