Datasheet

www.ti.com
PARAMETER MEASUREMENT INFORMATION
C
L
(see Note A)
TEST CIRCUIT
S1
2 × V
DD
Open
GND
R
L
R
L
t
PZL
V
OH
− 0.3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z
O
= 50 Ω, t
r
≤ 2.5 ns, t
f
≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as t
en
.
50 Ω
V
G1
V
DD
DUT
50 Ω
V
IN
50 Ω
V
G2
V
I
TEST
R
L
S1 V
∆
C
L
V
CC
V
I
t
PLZ
/t
PZL
1.8 V ± 0.1 V 2 × V
DD
100 Ω GND No Load 0.3 V
Input Generator
Input Generator
V
DD
/2
V
DD
/2
V
O
t
PHZ
/t
PZH
1.8 V ± 0.1 V GND 100 Ω V
DD
No Load 0.3 V
Output Control
(V
IN
)
V
DD
V
OH
V
OL
+ 0.3 V
V
OH
V
OL
0 V
t
PZH
t
PLZ
t
PHZ
Output
Waveform 2
S1 at GND
(see Note B)
Output
Waveform 1
S1 at 2 y V
DD
(see Note B)
V
OL
SA
CTRL
V
DD
/2
V
DD
/2
TS2PCIE2212
PCI Express™ SIGNAL SWITCH
SCDS209 – JUNE 2006
(Enable and Disable Times)
Figure 6. Test Circuit and Voltage Waveforms
6
Submit Documentation Feedback