Datasheet

V
+
NC or NO
V
NC
or V
NO
V
I
NC or NO
COM
V
COM
GND
V–
C
L
(2)
R
L
t
BBM
50%
90% 90%
V
NC
or V
NO
= V
+
/2
R
L
= 50 Ω
C
L
= 35 pF
Logic
Input
(1)
Logic
Input
(V
I
)
Switch
Output
(V
COM
)
V
IO
0
IN
(1)
All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, Z
O
= 50 Ω, t
r
< 5 ns, t
f
< 5 ns.
(2)
C
L
includes probe and jig capacitance.
V
+
GND
NO
IN
R
GEN
V
I
COM V
COM
C
L
(1)
OFF
V
COM
ON OFF
∆V
COM
V
GEN
+
V
I
= V
IH
or V
IL
C
L
= 1 nF
V
GEN
= 0 to V
+
R
GEN
= 0
Q
C
= C
L
× ∆V
COM
Logic
Input
(2)
V
IH
V
IL
Logic
Input
(V
I)
(1)
C
L
includes probe and jig capacitance.
(2)
All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, Z
O
= 50 Ω, t
r
< 5 ns, t
f
< 5 ns.
V–
NO
COM
V
NO
V
COM
Channel OFF: NO to COM
Network Analyzer Setup
Source Power = 0 dBm
(632-mV P-P at 50-Wload)
DC Bias = 350 mV
50 W
V
+
GND
50 W
50 W
Network Analyzer
Source
Signal
IN
V
I
+
V
I
= V
IO
or GND
V–
TS12A12511
www.ti.com SCDS248B –OCTOBER 2009– REVISED APRIL 2011
Figure 17. Break-Before-Make Time Delay (t
BBM
)
Figure 18. Charge Injection (Q
C
)
Figure 19. OFF Isolation (O
ISO
)
Copyright © 2009–2011, Texas Instruments Incorporated 13