Datasheet

TPS92311
R
ISNS
C
COMP
D
ZCD
C
VCC
R
DLY
SWSW
GND
ZCD
VIN
SW
ISNS
SW
GND
COMP
MODE1
DLY
MODE2
NC
NC NC
TPS92311
SNVS811B MAY 2012REVISED MAY 2013
www.ti.com
In this design example, open circuit AUX winding OVP voltage threshold is set to 30V. Assume the current
through the AUX winding is 0.4mA typical.
As a result, R2 is 66kΩ and R3 is 11k. Also, for suppressing high frequency noise at the ZCD pin, a 15pF
capacitor connects the ZCD pin to ground is recommended.
Auxiliary Winding V
cc
Diode Selection
The VCC diode D2 provides the supply current to the converter, low temperature coefficient , low reverse
leakage and ultra fast diode is recommended.
Compensation Capacitor And Delay Timer Resistor Selection
To achieve PFC function with a constant on time flyback converter, a low frequency response loop is required. In
most applications, a 3.3µF C
COMP
capacitor is suitable for compensation.
Figure 23. Compensation and DLY Timer connection
The resistor R
DLY
connecting the DLY pin to ground is used to set the delay time between the ZCD trigger to
power MOSFET turn on. The delay time required can be calculated with the parasitic capacitance at the drain of
MOSFET to ground and primary inductance of the transformer. Equation in below can be used to find the delay
time and Figure 18 in previous page can help to find the resistance once the delay time is calculated
(16)
For example, using a transformer with primary inductance L
P
= 1mH, and power MOSFET drain to ground
capacitor C
DS
=37pF, the t
DLY
can be calculated by the upper equation. As a result, t
DLY
=302ns and R
DLY
is
6.31kΩ. The delay time may need to change according to the primary inductance of the transformer. The typical
level of output current will shift if inappropriate delay time is chosen.
Output Flywheel Diode Selection
To increase the overall efficiency of the system, a low forward voltage schottky diode with appropriate rating
should be used.
Primary Side Snubber Design
The leakage inductance can induce a high voltage spike when power MOSFET is turned off. Figure 24 illustrates
the operation waveform. A voltage clamp circuit is required to protect the power MOSFET. The voltage of
snubber clamp (V
SN
) must be higher than the sum of over shoot voltage (V
OS
), LED open load voltage multiplied
by the transformer turn ratio (n). In this examples, the V
OS
is 50V and LED maximum voltage, V
LED(MAX)
is 30V,
transformer turn ratio is 3.8. The snubber voltage required can be calculated with following equations.
18 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: TPS92311