Datasheet

TSD
V
TRIG
/V
ARM
ZC
OVP
ON
OCP
LEB
iLimit
T
ON
Peak Hold
CONTROL
V
ONpk
V
ONpk
D
UVLO
DRV
GATE
OFT
ZC
DELAY
ON
Idly
V/I
COMP
COMP
T
ON
Control
T
ON
VCC
ZCD
DLY
ISNS
BIAS & V
REF
VC1
IREF
PGND
UVLO
VC1
MODE Decode
MODE1
MODE2
AGND
V
REF
LEB
TPS92310
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SNVS792 FEBRUARY 2012
SIMPLIFIED INTERNAL BLOCK DIAGRAM
Figure 14. Simplified Block Diagram
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