Datasheet
TPS92001, TPS92002
SLUSA24A –FEBRUARY 2010–REVISED NOVEMBER 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
RANGE UNIT
VDD 19
Input voltage range SS -0.3 to REF + 0.3 V
RTC, RTD -0.3 to REF + 0.3
I
REF
-15
Continuous input current mA
I
VDD
25
Output current I
GD
(tpw < 1 µs and Duty Cycle < 10%) -0.4 to 0.8 A
Operating junction temperature T
J
−55 to +150 °C
Storage temperature T
stg
−65 to +150
Lead temperature Soldering, 10 s +300
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages
are with respect to GND. Currents are positive into, negative out of the specified terminal.
RECOMMENDED OPERATING CONDITIONS
MIN MAX UNIT
VDD Input voltage 21 V
I
GD
Output sink current 0 A
T
J
Operating junction temperature –40 105 °C
DISSIPATION RATINGS
q
JA
, THERMAL q
JB
, THERMAL
T
A
= 25°C T
A
= 85°C T
B
= 85°C
IMPEDANCE IMPEDANCE
PACKAGE POWER POWER POWER
JUNCTION-TO-AMBIENT, JUNCTION-TO-BOARD,
RATING (mW) RATING (mW) RATING (mW)
NO AIRFLOW (°C/W) NO AIRFLOW (°C/W)
SOIC-8 (D) 165
(1)
55 606
(2)
242
(2)
730
(2)(3)
MSOP-8 (DGK) 181
(1)
62 552
(2)
221
(2)
664
(3)(2)
(1) Tested per JEDEC EIA/JESD51-1. Thermal resistance is a function of board construction and layout. Air flow will reduce thermal
resistance. This number is included only as a general guideline; see TI document SPRA953 IC Package Thermal Metrics.
(2) Maximum junction temperature T
J
, equal to 125°C.
(3) Thermal resistance to the circuit board is lower. Measured with standard single-sided PCB construction. Board temperature, T
B
,
measured approximately 1 cm from the lead to board interface. This number is provided only as a general guideline.
ELECTROSTATIC DISCHARGE (ESD) PROTECTION
MIN MAX UNIT
Human body model 2000
V
CDM 1500
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