Datasheet

C2
B2
A2
C1
B1
D
E
A1
C3
A3
TOP VIEW BOTTOM VIEW
YML
A1
LSB
CC
TPS82690
TPS82695
TPS82697
www.ti.com
SLVSA66B JUNE 2011 REVISED FEBRUARY 2012
THERMAL INFORMATION
The die temperature of the TPS8269x must be lower than the maximum rating of 125°C, so care should be taken
in the layout of the circuit to ensure good heat sinking of the TPS8269x.
To estimate the junction temperature, approximate the power dissipation within the TPS8269x by applying the
typical efficiency stated in this datasheet to the desired output power; or, by taking a power measurement if you
have an actual TPS8269x device and TPS8269xEVM evaluation module. Then calculate the internal temperature
rise of the TPS8269x above the surface of the printed circuit board by multiplying the TPS8269x power
dissipation by the thermal resistance.
The actual thermal resistance of the TPS8269x to the printed circuit board depends on the layout of the circuit
board, but the thermal resistance given in the Thermal Information Table can be used as a guide.
Three basic approaches for enhancing thermal performance are listed below:
Improve the power dissipation capability of the PCB design.
Improve the thermal coupling of the component to the PCB.
Introduce airflow into the system.
PACKAGE SUMMARY
SIP PACKAGE
Code:
CC Customer Code (device/voltage specific)
YML Y: Year, M: Month, L: Lot trace code
LSB L: Lot trace code, S: Site code, B: Board locator
MicroSiP
TM
DC/DC MODULE PACKAGE DIMENSIONS
The TPS8269x device is available in an 8-bump ball grid array (BGA) package. The package dimensions are:
D = 2.30 ±0.05 mm
E = 2.90 ±0.05 mm
Copyright © 20112012, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): TPS82690 TPS82695 TPS82697