Datasheet

JP2

PWM

MODE

PSM

JP1

OFF

GND

VIN

VOUT

GND

S-

S+

S-

TPS826xxEVM-646

Power Supply

Load

Oscilloscope

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Test Configuration

4 Test Configuration

4.1 Hardware Setup

Figure 2 illustrates a typical hardware test configuration.

Figure 2. Hardware Board Connection

4.2 Procedure

Follow these procedures when configuring the EVM for testing.

CAUTION

Many of the components on the TPS826xxEVM-646 are susceptible to damage

by electrostatic discharge (ESD). Customers are advised to observe proper

ESD handling precautions when unpacking and handling the EVM, including

the use of a grounded wrist strap, bootstraps, or mats at an approved ESD

workstation. An electrostatic smock and safety glasses should also be worn.

1. Work at an ESD workstation. Make sure that any wrist straps, bootstraps, or mats are connected and

reference the user to earth ground before power is applied to the EVM. Electrostatic smocks and

safety glasses should also be worn.

2. Connect a dc power supply between J1 and J2 on the TPS826xxEVM. Note that the input voltage

should range from 2.3 V to 4.8 V. Keep the wires from the input power supply to EVM as short as

possible and twisted.

3. Connect a dc voltmeter or oscilloscope to the output sense connection of the EVM.

4. A load can be connected between J4 and J6 on the TPS826xxEVM.

5. To enable the converter, connect the shorting bar on JP1 between ENABLE and ON on the

TPS826xxEVM.

6. The TPS826xxEVM has a feature that allows users to switch between Power-Save Mode under light

loads and forced PWM mode, with jumper JP2.

SLVU383D–October 2010–Revised November 2011 TPS826xxEVM

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