Datasheet

TPS7A8101
SBVS179A –DECEMBER 2011–REVISED APRIL 2012 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
TPS7A8101yyyz YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder on www.ti.com.
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range (unless otherwise noted).
(1)
VALUE
MIN MAX UNIT
IN –0.3 +7.0 V
FB, NR –0.3 +3.6 V
Voltage
EN –0.3 V
IN
+ 0.3
(2)
V
OUT –0.3 +7.0 V
Current OUT Internally Limited A
Operating virtual junction, T
J
–55 +150 °C
Temperature
Storage, T
stg
–55 +150 °C
Human body model (HBM)
2 kV
QSS 009-105 (JESD22-A114A)
Electrostatic discharge (ESD) rating
(3)
Charged device model (CDM)
500 V
QSS 009-147 (JESD22-C101B.01)
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-
maximum-rated conditions for extended periods my affect device reliability.
(2) V
EN
absolute maximum rating is V
IN
+ 0.3 V or +7.0 V, whichever is smaller.
(3) ESD testing is performed according to the respective JESD22 JEDEC standard.
2 Copyright © 2011–2012, Texas Instruments Incorporated