Datasheet

P
D
+
ǒ
V
IN
* V
OUT
Ǔ
I
OUT
R =
qJA
(+125°C T )
P
-
A
D
160
140
120
100
80
60
40
20
0
q
JA
( C/W)°
0 1 2 3
4 5
6
7
8 9 10
BoardCopperArea( )in
2
TPS7A8101
www.ti.com SBVS179A –DECEMBER 2011–REVISED APRIL 2012
Power Dissipation
Knowing the device power dissipation and proper sizing of the thermal plane that is connected to the tab or pad
is critical to avoiding thermal shutdown and ensuring reliable operation.
Power dissipation of the device depends on input voltage and load conditions and can be calculated using
Equation 3:
(3)
Power dissipation can be minimized and greater efficiency can be achieved by using the lowest possible input
voltage necessary to achieve the required output voltage regulation.
On the SON (DRB) package, the primary conduction path for heat is through the exposed pad to the printed
circuit board (PCB). The pad can be connected to ground or be left floating; however, it should be attached to an
appropriate amount of copper PCB area to ensure the device does not overheat. The maximum junction-to-
ambient thermal resistance depends on the maximum ambient temperature, maximum device junction
temperature, and power dissipation of the device and can be calculated using Equation 4:
(4)
Knowing the maximum R
θJA
, the minimum amount of PCB copper area needed for appropriate heatsinking can
be estimated using Figure 32.
Note: θ
JA
value at board size of 9 in
2
(that is, 3 in × 3 in) is a JEDEC standard.
Figure 32. θ
JA
vs Board Size
Figure 32 shows the variation of θ
JA
as a function of ground plane copper area in the board. It is intended only as
a guideline to demonstrate the effects of heat spreading in the ground plane and should not be used to estimate
actual thermal performance in real application environments.
NOTE: When the device is mounted on an application PCB, it is strongly recommended to use Ψ
JT
and Ψ
JB
, as
explained in the Estimating Junction Temperature section.
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