Datasheet

Q1
Oscillator
UVLO
Comp. with
Internal
Reference
Logic
Control
Band Gap
Over Current Detection
VRef1
Regulator
Control
VIN
VOUT
CIN
COUT
VIN
VOUT
GND
VRef1
Charge
Pump
Error
Amp
Temperature Sensor/
Thermal Shutdown
GND
VOUT
VIN
1
2
3
TPS7A6533-Q1
TPS7A6550-Q1
SLVSA98C –MAY 2010–REVISED JULY 2012 www.ti.com
DEVICE INFORMATION
KVU PACKAGE
(TOP VIEW)
TERMINAL FUNCTIONS
NO. NAME TYPE DESCRIPTION
Input voltage pin: The unregulated input voltage is supplied to this pin. A bypass capacitor is connected
1 VIN I
between VIN pin and GND pin to dampen input line transients.
2 GND I/O Ground pin: This is signal ground pin of the IC.
Regulated output voltage pin: This is a regulated voltage output (V
OUT
= 3.3 V or 5 V, as applicable) pin
3 VOUT O with a limitation on maximum output current. In order to achieve stable operation and prevent oscillation,
an external output capacitor (C
OUT
) with low ESR is connected between this pin and the GND pin.
FUNCTIONAL BLOCK DIAGRAM
Figure 3. TPS7A65xx-Q1 Functional Block Diagram
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Product Folder Link(s): TPS7A6533-Q1 TPS7A6550-Q1