Datasheet

0
0.5
1
1.5
2
2.5
3
3.5
4
0 25 50 75 100 125
Ambient Air Temperature (°C)
JESD 51-3 (KVU)
JESD 51-5 (KVU)
Power Dissipated (W)
150
1µF
to
10µF
0.1µF 0.1µF
VIN VOUT
GND
TPS7A65xx
VOUT
VIN
10µF
to
22µF
TPS7A6533-Q1
TPS7A6550-Q1
SLVSA98C –MAY 2010–REVISED JULY 2012 www.ti.com
APPLICATION INFORMATION
A typical application circuit for TPS7A65xx-Q1 is For a given maximum junction temperature (T
J-Max
),
Figure 9. Depending on the end application, one may calculate the maximum ambient air temperature (T
A-
use different values of external components. An
Max
) at which the device can operate using
application may require a larger output capacitor Equation 4.
during fast load steps to prevent the output from
T
A-Max
= T
J-Max
– (θ
JA
× P
D
) (4)
temporarily dropping down. TI recommends a low-
Example
ESR ceramic capacitor with dielectric of type X5R or
X7R. The user can additionally connect a bypass
If I
OUT
= 100 mA, V
OUT
= 5 V, V
IN
= 14 V, I
QUIESCENT
=
capacitor at the output to decouple high-frequency
250 µA and θ
JA
= 30˚C/W, the continuous power
noise as per the end application.
dissipated in the device is 0.9 W. The rise in junction
temperature due to power dissipation is 27˚C. For a
maximum junction temperature of 150˚C, maximum
ambient air temperature at which the device can
operate is 123˚C.
For adequate heat dissipation, TI recommends
soldering the power pad (exposed heat sink) to the
thermal land pad on the PCB. Doing this provides a
heat conduction path from the die to the PCB and
reduces overall package thermal resistance.
Figure 10 shows power derating curves for the
TPS7A65xx-Q1 family of devices in the KVU (DPAK)
package.
Figure 9. Typical Application Schematic
Power Dissipation and Thermal
Considerations
Calculate the power dissipated in the device using
Equation 1.
P
D
= I
OUT
× (V
IN
- V
OUT)
) + I
QUIESCENT
× V
IN
(1)
where,
P
D
= continuous power dissipation
I
OUT
= output current
V
IN
= input voltage
V
OUT
= output voltage
I
QUIESCENT
= quiescent current
I
QUIESCENT
<< I
OUT
; therefore, ignore the term
Figure 10. Power Derating Curves
I
QUIESCENT
× V
IN
in Equation 1.
For a device under operation at a given ambient air
For optimum thermal performance, TI recommends
temperature (T
A
), calculate the junction temperature
using a high-K PCB with thermal vias between the
(T
J
) using Equation 2.
ground plane and solder pad or thermal land pad.
T
J
= T
A
+ (θ
JA
× P
D
) (2)
Figure 11 (a) and (b) show this. Further, a design can
improve the heat-spreading capabilities of a PCB
where,
considerably by using a thicker ground plane and a
θ
JA
= junction-to-ambient air thermal impedance
thermal land pad with a larger surface area.
Calculate the rise in junction temperature due to
power dissipation using Equation 3.
ΔT = T
J
– T
A
= (θ
JA
× P
D
) (3)
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