Datasheet

P =(V V )I-
D IN OUT OUT
TPS7A49xx
SBVS121C AUGUST 2010REVISED DECEMBER 2013
www.ti.com
LAYOUT
PACKAGE MOUNTING at least +35°C above the maximum expected ambient
condition of your particular application. This
Solder pad footprint recommendations for the
configuration produces a worst-case junction
TPS7A49xx are available at the end of this product
temperature of +125°C at the highest expected
datasheet and at www.ti.com.
ambient temperature and worst-case load.
The internal protection circuitry of the TPS7A49xx
BOARD LAYOUT RECOMMENDATIONS TO
has been designed to protect against overload
IMPROVE PSRR AND NOISE PERFORMANCE
conditions. It was not intended to replace proper
To improve ac performance such as PSRR, output
heatsinking. Continuously running the TPS7A49xx
noise, and transient response, it is recommended that
into thermal shutdown degrades device reliability.
the board be designed with separate ground planes
for IN and OUT, with each ground plane connected
POWER DISSIPATION
only at the GND pin of the device. In addition, the
ground connection for the output capacitor should The ability to remove heat from the die is different for
connect directly to the GND pin of the device. each package type, presenting different
considerations in the PCB layout. The PCB area
Equivalent series inductance (ESL) and equivalent
around the device that is free of other components
series resistance (ESR) must be minimized to
moves the heat from the device to the ambient air.
maximize performance and ensure stability. Every
Performance data or JEDEC low- and high-K boards
capacitor (C
IN
, C
OUT
, C
NR/SS
, C
BYP
) must be placed as
are given in the Dissipation Ratings Table. Using
close as possible to the device and on the same side
heavier copper increases the effectiveness in
of the printed circuit board (PCB) as the regulator
removing heat from the device. The addition of plated
itself.
through-holes to heat dissipating layers also improves
the heatsink effectiveness.
Do not place any of the capacitors on the opposite
side of the PCB from where the regulator is installed.
Power dissipation depends on input voltage and load
The use of vias and long traces is strongly
conditions. Power dissipation (P
D
) is equal to the
discouraged because they may impact system
product of the output current times the voltage drop
performance negatively and even cause instability.
across the output pass element, as shown in
Equation 2:
If possible, and to ensure the maximum performance
denoted in this product datasheet, use the same
(2)
layout pattern used for TPS7A49 evaluation board,
available at www.ti.com.
SUGGESTED LAYOUT AND SCHEMATIC
THERMAL PROTECTION Layout is a critical part of good power-supply design.
There are several signal paths that conduct fast-
Thermal protection disables the output when the
changing currents or voltages that can interact with
junction temperature rises to approximately +170°C,
stray inductance or parasitic capacitance to generate
allowing the device to cool. When the junction
noise or degrade the power-supply performance. To
temperature cools to approximately +150°C, the
help eliminate these problems, the IN pin should be
output circuitry is enabled. Depending on power
bypassed to ground with a low ESR ceramic bypass
dissipation, thermal resistance, and ambient
capacitor with a X5R or X7R dielectric.
temperature, the thermal protection circuit may cycle
on and off. This cycling limits the dissipation of the The GND pin should be tied directly to the PowerPAD
regulator, protecting it from damage as a result of under the IC. The PowerPAD should be connected to
overheating. any internal PCB ground planes using multiple vias
directly under the IC.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an It may be possible to obtain acceptable performance
inadequate heatsink. For reliable operation, junction with alternate PCB layouts; however, the layout
temperature should be limited to a maximum of shown in Figure 31 and the schematic shown in
+125°C. To estimate the margin of safety in a Figure 32 have been shown to produce good results
complete design (including heatsink), increase the and are meant as a guideline.
ambient temperature until the thermal protection is
triggered; use worst-case loads and signal conditions.
For good reliability, thermal protection should trigger
14 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated