Datasheet

Y
Y Y ´
JT J T JT D
: T = T + PY ´
JB J B JB D
: T = T + P
120
100
80
60
40
20
0
q
JA
( C/W)
°
0 1 2 3
4 5
6
7
8 9 10
BoardCopperArea(in )
2
q
JA
(RGW)
TPS7A4700
TPS7A4701
SBVS204E –JUNE 2012–REVISED JANUARY 2014 www.ti.com
NOTE: θ
JA
value at a board size of 9-in
2
(that is, 3-in × 3-in) is a JEDEC standard.
Figure 25. θ
JA
vs Board Size
Estimating Junction Temperature
The JEDEC standard now recommends the use of PSI thermal metrics to estimate the junction temperatures of
the LDO while in-circuit on a typical PCB board application. These metrics are not strictly speaking thermal
resistances, but rather offer practical and relative means of estimating junction temperatures. These PSI metrics
are determined to be significantly independent of copper-spreading area. The key thermal metrics (Ψ
JT
and Ψ
JB
)
are given in the Thermal Information table and are used in accordance with Equation 9.
where:
P
D
is the power dissipated as explained in Equation 7,
T
T
is the temperature at the center-top of the device package, and
T
B
is the PCB surface temperature measured 1 mm from the device package and centered on the
package edge. (9)
BOARD LAYOUT
For best overall performance, all circuit components are recommended to be located on the same side of the
circuit board and as near as practical to the respective LDO pin connections. Ground return connections to the
input and output capacitor, and to the LDO ground pin should also be as close to each other as possible and
connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit
connections is strongly discouraged and negatively affects system performance. This grounding and layout
scheme minimizes inductive parasitics and thereby reduces load-current transients, minimizes noise, and
increases circuit stability.
A ground reference plane is also recommended and should be either embedded in the PCB itself or located on
the bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the
output voltage, shield noise, and behaves similar to a thermal plane to spread (or sink) heat from the LDO device
when connected to the PowerPAD™. In most applications, this ground plane is necessary to meet thermal
requirements.
Use the TPS7A4700EVM-094 evaluation module (EVM), available for download at www.ti.com, as a reference
for layout and application design.
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