Datasheet
TPS7A33
SBVS169C –DECEMBER 2011–REVISED FEBRUARY 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
TPS7A33xxyyyz XX is nominal output voltage (01 = Adjustable).
(2)
YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder on www.ti.com.
(2) For fixed –1.2-V operation, tie FB to OUT.
ABSOLUTE MAXIMUM RATINGS
(1)
Over operating free-air temperature range –40°C ≤ T
J
≤ +125°C, unless otherwise noted.
VALUE
MIN MAX UNIT
IN pin to GND pin –36 +0.3 V
OUT pin to GND pin –33 +0.3 V
OUT pin to IN pin –0.3 +36 V
FB pin to GND pin –2 +0.3 V
Voltage
FB pin to IN pin –0.3 +36 V
EN pin to GND pin –36 +10 V
NR/SS pin to IN pin –0.3 +36 V
NR/SS pin to GND pin –2 +0.3 V
Current Peak output Internally limited
Operating virtual junction, T
J
, absolute maximum range
(2)
–40 +150 °C
Temperature
Storage, T
stg
–65 +150 °C
Human body model (HBM) 1 kV
Electrostatic discharge rating
Charged device model (CDM) 500 V
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-
maximum rated conditions for extended periods may affect device reliability.
(2) No permanent damage will occur to the part operating within this range though electrical performance is not ensured outside the
operating free-air temperature range.
THERMAL INFORMATION
TPS7A33
THERMAL METRIC
(1)
KC (TO-220) RGW (QFN)
(2)
UNITS
7 PINS 20 PINS
θ
JA
Junction-to-ambient thermal resistance 31.2 30.5
θ
JC(top)
Junction-to-case(top) thermal resistance 40.0 27.6
θ
JB
Junction-to-board thermal resistance 17.4 N/A
°C/W
ψ
JT
Junction-to-top characterization parameter 6.4 0.37
ψ
JB
Junction-to-board characterization parameter 17.2 10.6
θ
JC(bottom)
Junction-to-case(bottom) thermal resistance 0.8 4.1
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The RGW package is product preview.
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