Datasheet

1300 mil
2200 mil
TPS7A16
SBVS171D –DECEMBER 2011–REVISED JANUARY 2014 www.ti.com
SUGGESTED LAYOUT AND SCHEMATIC
Layout is a critical part of good power-supply design. There are several signal paths that conduct fast-changing
currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade
the power-supply performance. To help eliminate these problems, the IN pin should be bypassed to ground with
a low ESR ceramic bypass capacitor with a X5R or X7R dielectric.
It may be possible to obtain acceptable performance with alternative PCB layouts; however, the layout and the
schematic have been shown to produce good results and are meant as a guideline.
Figure 18 shows the schematic for the suggested layout.Figure 19 and Figure 20 show the top and bottom
printed circuit board (PCB) layers for the suggested layout.
Figure 18. Schematic for Suggested Layout
Figure 19. Suggested Layout: Top Layer
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