Datasheet

TPS7A16
SBVS171D –DECEMBER 2011–REVISED JANUARY 2014 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
TPS7A16xx yyy z XX is nominal output voltage ( 01 = Adjustable, 33 = 3.3 V, 50 = 5.0 V)
(2)
YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder on www.ti.com.
(2) Additional output voltage options are available. Minimum-order quantities may apply; contact your sales representative for details.
ABSOLUTE MAXIMUM RATINGS
(1)
Over operating free-air temperature range –40°C ≤ T
J
≤ +125°C (unless otherwise noted).
VALUE
MIN MAX UNIT
IN pin to GND pin –0.3 +62 V
OUT pin to GND pin –0.3 +20 V
OUT pin to IN pin –62 +0.3 V
FB pin to GND pin –0.3 +3 V
Voltage FB pin to IN pin –62 +0.3 V
EN pin to IN pin –62 0.3 V
EN pin to GND pin –0.3 +62 V
PG pin to GND pin –0.3 +5.5 V
DELAY pin to GND pin –0.3 +5.5 V
Current Peak output Internally limited
Operating virtual junction, T
J
, absolute maximum range
(2)
–40 +150 °C
Temperature
Storage, T
stg
–65 +150 °C
Human body model (HBM) 2 kV
Electrostatic discharge rating
Charged device model (CDM) 500 V
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-
maximum rated conditions for extended periods may affect device reliability.
(2) No permanent damage will occur to the part operating within this range though electrical performance is not guaranteed outside the
operating free-air temperature range.
THERMAL INFORMATION
TPS7A1601
THERMAL METRIC
(1)
DGN DRB UNITS
8 PINS 8 PINS
θ
JA
Junction-to-ambient thermal resistance 66.2 44.5
θ
JC(top)
Junction-to-case(top) thermal resistance 45.9 49.5
θ
JB
Junction-to-board thermal resistance 34.6 11.3
°C/W
ψ
JT
Junction-to-top characterization parameter 1.9 0.7
ψ
JB
Junction-to-board characterization parameter 34.3 141.2
θ
JC(bottom)
Junction-to-case(bottom) thermal resistance 14.9 4.7
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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