Datasheet

DDC (TSOT-23-5) PACKAGE
(TOP VIEW)
OUT
NR
IN
GND
EN
1
2
3
5
4
DRV (SON-6) PACKAGE
(TOP VIEW)
IN
N/C
EN
6
5
4
OUT
FB
GND
1
2
3
GND
N/C – No internal connection
Thermal
Shutdown
UVLO
Current
Limit
2
µ
A
Overshoot
Detect
500k
Quickstart
1.193V
Bandgap
IN
EN
NR
OUT
GND
400
Ω
Thermal
Shutdown
UVLO
Current
Limit
3.3M
Ω
Overshoot
Detect
500k
1.193V
Bandgap
IN
EN
FB
OUT
GND
400
Ω
TPS79901-Q1, TPS79912-Q1, TPS79915-Q1
TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1
SBVS097E –MARCH 2008–REVISED JANUARY 2012 www.ti.com
Figure 1. Fixed-Voltage Version Figure 2. Adjustable-Voltage Version
PIN CONFIGURATIONS
Table 1. PIN DESCRIPTIONS
PIN
NO. DESCRIPTION
NAME
DDC DRV
IN 1 6 Input supply
GND 2 3, Pad Ground. The pad must be tied to GND.
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into
EN 3 4
shutdown mode. EN can be connected to IN if not used.
Fixed-voltage versions only; connecting an external capacitor to this pin bypasses noise generated by
NR 4 2
the internal bandgap. This capacitor allows output noise to be reduced to very low levels.
Adjustable version only; this pin is the input to the control loop error amplifier, and is used to set the
FB 4 2
output voltage of the device.
Output of the regulator. A small capacitor (total typical capacitance ≥ 2 μF ceramic) is needed from
OUT 5 1
this pin to ground to ensure stability.
N/C — 5 Not internally connected. This pin must either be left open or tied to GND.
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Product Folder Links: TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1
TPS79933-Q1