Datasheet

P
D
+
ǒ
V
IN
* V
OUT
Ǔ
I
OUT
Y Y
JT J T JT D
:T =T + P·
Y Y
JB J B JB D
:T =T + P·
R
qJA
+
(
)125
O
C * T
A
)
P
D
0
20
40
60
80
100
120
140
160
0 2 4 6 8 10
DRB
DCQ
q
JA
(°C/W)
BoardCopper Area(in )
2
0
5
10
15
20
25
30
35
0 1 2 3 4 5 6 7 8 9 10
DRB Y
JB
DRB Y
JT
DCQ Y
JT
DCQ Y
TB
Y Y
JT JB
and (°C/W)
Board Copper Area (in )
2
TPS795xx
www.ti.com SLVS350H –OCTOBER 2002–REVISED AUGUST 2010
THERMAL INFORMATION
Figure 25 shows the variation of q
JA
as a function of
Power Dissipation
ground plane copper area in the board. It is intended
only as a guideline to demonstrate the effect of heat
Knowing the device power dissipation and proper
spreading in the ground plane and should not be
sizing of the thermal plane that is connected to the
used to estimate the thermal performance in real
tab or pad is critical to avoiding thermal shutdown
application environments.
and ensuring reliable operation.
NOTE: When the device is mounted on an
Power dissipation of the device depends on input
application PCB, it is strongly recommended to use
voltage and load conditions and can be calculated
Ψ
JT
and Ψ
JB
, as explained in the Estimating Junction
using Equation 4:
Temperature section.
(4)
ESTIMATING JUNCTION TEMPERATURE
Power dissipation can be minimized and greater
efficiency can be achieved by using the lowest
Using the thermal metrics Ψ
JT
and Ψ
JB
, as shown in
possible input voltage necessary to achieve the
the Thermal Information table, the junction
required output voltage regulation.
temperature can be estimated with corresponding
formulas (given in Equation 6). For backwards
On the SON (DRB) package, the primary conduction
compatibility, an older q
JC
,Top parameter is also
path for heat is through the exposed pad to the
listed.
printed circuit board (PCB). The pad can be
connected to ground or be left floating; however, it
should be attached to an appropriate amount of
(6)
copper PCB area to ensure the device does not
overheat. On the SOT-223 (DCQ) package, the
Where P
D
is the power dissipation shown by
primary conduction path for heat is through the tab to
Equation 5, T
T
is the temperature at the center-top of
the PCB. The tab should be connected to ground.
the IC package, and T
B
is the PCB temperature
The maximum junction-to-ambient thermal resistance
measured 1 mm away from the IC package on the
depends on the maximum ambient temperature,
PCB surface (as Figure 27 shows).
maximum device junction temperature, and power
dissipation of the device and can be calculated using NOTE: Both T
T
and T
B
can be measured on actual
Equation 5: application boards using a thermo-gun (an infrared
thermometer).
For more information about measuring T
T
and T
B
, see
(5)
the application note SBVA025, Using New Thermal
Knowing the maximum R
qJA
, the minimum amount of
Metrics, available for download at www.ti.com.
PCB copper area needed for appropriate heatsinking
By looking at Figure 26, the new thermal metrics (Ψ
JT
can be estimated using Figure 25.
and Ψ
JB
) have little dependency on board size. That
is, using Ψ
JT
or Ψ
JB
with Equation 6 is a good way to
estimate T
J
by simply measuring T
T
or T
B
, regardless
of the application board size.
Note: q
JA
value at board size of 9 in
2
(that is, 3 in
× 3 in) is a JEDEC standard.
Figure 25. q
JA
vs Board Size
Figure 26. Ψ
JT
and Ψ
JB
vs Board Size
space
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