User’s Guide September 2003 SBVU001
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the specified input and output ranges described in the EVM User’s Guide. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Contents Preface About This Manual This user’s guide describes the characteristics, operation, and use of the TPS793xxYEQEVM low drop-out (LDO) evaluation module (EVM). This EVM features a TI LDO that offers ultra low noise performance with high PSRR, and 200mA load current capability all in the chip-scale package. This user’s guide includes setup instructions, a schematic diagram, a bill of materials (BOM), and PCB layout drawings for the evaluation module.
Contents FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference.
Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 2 Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Input/Output Connector Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Set-Up . . . . . . . . . . . . . . . . . . . . . .
Chapter 1 The Texas Instruments TPS793xxYEQEVM evaluation module (EVM) helps designers evaluate the operation and performance of the TPS793 family of devices in the chip-scale package. These devices are ultra low noise, high PSRR low drop-outs (LDOs) suitable for RF applications. This EVM is specifically designed and optimized to operate over the entire input voltage range of the TPS793xxYEQ LDO (2.7V to 5.5V).
Chapter 2 This chapter describes the jumpers and connectors on the EVM as well as how to properly connect, set up, and use the TPS793xxYEQEVM. Topic Page 2.1 Input/Output Connector Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 Set-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.3 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input/Output Connector Descriptions 2.1 Input/Output Connector Descriptions 2.1.1 J1 − VIN This is the positive connection to the input power supply. For best performance this connection should have low inductance and be driven by a low-impedance source. 2.1.2 J2 − GND This is the return connection for the input power supply. 2.1.3 J3 − VOUT This is the positive connection from the output of the low dropout regulator. Connect this pin to the positive input of the load. 2.1.
Chapter 3 This chapter provides the TPS793xxYEQEVM printed circuit board layout and illustrations. Topic 3.1 Page Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Layout 3.1 Layout Board layout is critical for reliable and easy to assemble chip-scale designs. Figure 3−1, Figure 3−2, and Figure 3−3 show the board layout for the TPS793xxYEQEVM printed wiring board (PWB). Careful attention should be given to the routing to the chip-scale IC lands. Refer to the NanoStar Wafer Chip-Scale Package Design Guide for specific layout guidelines. Figure 3−1. Assembly Layer Figure 3−2. Top Layer Routing Figure 3−3.
Chapter 4 This chapter provides the schematic for the TPS793xxYEQEVM. The bill of materials is also included for component and manufacturer reference. Topic Page 4.1 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 4.2 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Schematic 4.1 Schematic The complete electrical schematic for the TPS793xxYEQEVM is shown in Figure 4−1. Figure 4−1. TPS793xxYEQEVM Schematic Diagram 4.2 Bill of Materials Table 4−1. Bill of Materials 4-2 Count Reference Designator Description Size Manufacturer 1 C1 Capacitor, ceramic, 1.0µF, 10V, X5R, 10% 603 TDK C1608X5R1A105KT 1 C2 Capacitor, 4700pF, 50V, X7R, 10%, 402 TDK C1005X7R1H472KT 1 C3 Capacitor, ceramic, 4.7µF, 6.
