User’s Guide June 2002 Power Management Products Low Power SLVU060A
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
DYNAMIC WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of 2.7–5.5 V and the output current range of 0 mA to 200 mA. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Preface About This Manual This user’s guide describes the TPS793xxEVM LDO regulator evaluation module (SLVP191). Each EVM package contains one SLVP191 test board, with either a TPS79301DBV linear regulator or a TPS79328DBV linear regulator, as well as supporting passive components. The SLVP191 test board provides a convenient method of evaluating the performance of the TPS793xx linear regulator family as well as other SOT–23 packaged linear regulators with the same pinout.
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Running Title—Attribute Reference Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 TPS793xx Family of LDO Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 EVM Design Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Schematic . . . . . . . . . . . . . . . . . . . . . .
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Chapter 1 Introduction This user’s guide describes the TPS793xxEVM LDO regulator evaluation module (SLVP191). Each EVM package contains one SLVP191 test board, with either a TPS79301DBV linear regulator or a TPS79328DBV linear regulator, as well as supporting passive components. Topic Page 1.1 TPS793xx Family of LDO Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2 1.2 EVM Design Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2 1.
TPS793xx Family of LDO Regulators 1.1 TPS793xx Family of LDO Regulators Like all LDO linear regulators, the TPS793xx family of LDO regulators use a series pass element and feedback network, including an error amplifier and voltage reference, to provide a regulated output voltage from a slightly higher, possibly varying input voltage. However, these regulators have been optimized to reduce ripple and noise on the output.
Schematic 1.3 Schematic Figures 1–1 and 1–2 show the SLVP191 schematic diagram that is used in the TPS793xxEVM. Figure 1–1. TPS79301 Board Schematic J2 U1 TPS79301DBV 1 2 R1 10 k Ω C1 1µF 3 IN GND OUT ADJ EN BYPASS J1 EN R2 Not Used J4 6 5 4 C2 0.0047µ F VIN VOUT R4 C4 6.8 k Ω C3 4.7µ F 100 pF R3 30.1k Ω J3 GND Figure 1–2. TPS79328 Board Schematic J2 VIN U1 TPS79328DBV 1 2 R1 10 k Ω C1 1µF 3 J1 EN R2 Not Used IN GND OUT ADJ EN BYPASS J4 6 5 4 C2 0.0047µ F R4 Not Used C3 4.
Bill of Materials 1.4 Bill of Materials Table 1–2 lists materials required for the SLVP191 Table 1–1. SLVP191 Bill of Materials 79301 79328 Ref Des 1 1 1 1 Description Size MFR Part Number C1 Capacitor, ceramic, 1.0 µF, 6.3 V, 10% 603 Murata GRM39X7R105K6.3 1 C2 Capacitor, ceramic, 0.0047 µF, . . . 25 V, X7R, 10% 603 Murata GRM39X7R472K25 1 C3 Capacitor, ceramic, 4.
Board Layout 1.5 Board Layout Figures 1–3 and 1–4 show the board layout for the TPS793xxEVM. Figure 1–3. Top Layer Figure 1–4.
Board Layout Figure 1–5.
Chapter 2 EVM Test Setup This chapter provides recommended test equipment and procedures for performing evaluations using the TPS793xxEVM. Figure 2–1 shows the test setup. Figure 2–1.
The settings for the test equipment shown in Figure 2–1 are described below: - Power amplifier capable of dv/dt = 1 V/µs and with at least 1-A current limit connected to IN (J2) and GND (J3). - Function generator capable of generating both a 10-kHz, 1-VPP, sine wave and a 1-V square wave connected to the input of the power amplifier. - Oscilloscope with channel 1 connected to IN (J2), and channel 2 connected to OUT (J3).
Chapter 3 Test Results This chapter provides laboratory test results of the TPS793xxEVM. Figure 3–1 shows the line transient response of the TPS79328DBV device. The input voltage is set to 3.8 V and then a 1-V step is applied. The output load is 100 mA. Channel 1 is VI. Channel 2 is VO, ac-coupled. Figure 3–1.
Figure 3–2 shows the ripple rejection capabilities of the TPS79328DBV device. The input voltage is set to 5 V and a 1-VPP sine wave is added to the input dc voltage. The output load is 100 mA. Channel 1 is VI. Channel 2 is VO. Both are ac-coupled. Figure 3–2.
