Datasheet

 
 
SLVS325C − MARCH 2001 − REVISED MAY 2002
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11
POWER DISSIPATION AND JUNCTION TEMPERATURE
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than
or equal to P
D(max)
.
The maximum-power-dissipation limit is determined using the following equation:
P
D(max)
+
T
J
max * T
A
R
qJA
Where:
T
J
max is the maximum allowable junction temperature.
R
θJA
is the thermal resistance junction-to-ambient for the package, see the dissipation rating table.
T
A
is the ambient temperature.
(1)
The regulator dissipation is calculated using:
P
D
+
ǒ
V
I
* V
O
Ǔ
I
O
(2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the
thermal protection circuit.
PROGRAMMING THE TPS79101 ADJUSTABLE LDO REGULATOR
The output voltage of the TPS79101 adjustable regulator is programmed using an external resistor divider as
shown in Figure 33. The output voltage is calculated using:
V
O
+ V
ref
ǒ
1 )
R1
R2
Ǔ
(
3)
Where:
V
ref
= 1.2246 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should
be avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially
increases/decreases the feedback voltage and thus erroneously decreases/increases V
O
. The recommended
design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA, C1 = 15 pF for stability, and
then calculate R1 using:
R1 +
ǒ
V
O
V
ref
* 1
Ǔ
R2
(4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor
be placed between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages
>1.8 V, the approximate value of this capacitor can be calculated as:
C1 +
(3 10
*7
) (R1 ) R2)
(R1 R2)
(5)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage < 1.8 V is chosen, then the minimum
recommended output capacitor is 2.2 µF instead of 1 µF.