!" #$ % &" #'&$ " User’s Guide October 2002 PMP Portable Power SLVU074
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of 2.7 V to 5.5 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.
Information About Cautions and Warnings Preface Read This First About This Manual This user’s guide describes the characteristics, operation and use of the TPS78633EVM–207 1.5-A high PSRR, low noise, low dropout linear regulator evaluation module (EVM). The user’s guide includes a schematic diagram, printed-circuit board (PCB) layouts, and bill of materials. Electronic PCB layout files are available upon request.
Related Documentation From Texas Instruments The information in a caution or a warning is provided for your protection. Please read each caution and warning carefully. Related Documentation From Texas Instruments SLVS389 – TPS786xx data sheet, literature number SLVS351 – TPS796xx data sheet, literature number SLVS350 – TPS795xx data sheet, literature number FCC Warning This equipment is intended for use in a laboratory test environment only.
Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Performance Specification Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Modifications . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents vi
Chapter 1 Introduction This chapter contains background information for the TPS786xx family of devices and support documentation for the TPS78633EVM–207 evaluation module. The EVM performance specifications are also given. Topic Page 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Performance Specification Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 Modifications . . . . . . . . . . . . . . . . . .
Background 1.1 Background The purpose of the TPS78633EVM is to facilitate evaluation of the TPS786xx, TPS795xx and TPS796xx families of devices. The TPS78633EVM consists of the SLVP207 PCB, one TPS78633 3.3-V, 1.5-A linear regulator in a TO–263 package, and supporting passive components. The SLVP207 PCB is designed to accommodate multiple devices with similar pinouts in different packages (i.e., TO–220, TO–263, or SOT–223).
Chapter 2 Test Setup This chapter describes how to properly connect, and setup the TPS78633EVM. Topic 2.1 Page Test Setup for DC Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Test Setup for DC Testing 2.1 Test Setup for DC Testing Figure 2–1. Test Setup for DC Testing Power Supply 1 Load 5 V, 2 A 2-2 0 to 1.
Chapter 3 Board Layout This chapter provides a description of the SLVP207 board layout and layer illustrations used in the TPS78633EVM. Topic 3.1 Page Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Layout 3.1 Layout The EVM PCB consists of two layers of 1.5 oz. copper. The top side (component) layout of the EVM is shown in Figure 3–1. Large power and ground planes are used to minimize trace resistance. The input capacitor (C3) is located close to the input pin. Proper board layout is critical to ensure the best noise and PSRR performance.
Layout Figure 3–3. Top Side Layout Figure 3–4.
3-4
Chapter 4 Schematic and Bill of Materials The EVM schematic and bill of materials are presented in this chapter. Topic Page 4.1 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 4.2 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Schematic 4.1 Schematic Figure 4–1. Schematic + + + 4.2 Bill of Materials Table 4–1. Bill of Materials Qty Ref Des Description Size Mfr Part Number 0 C1 Open 805 1 C2 Capacitor, POSCAP, 100 µF, 10 V, 55 mΩ, 20% 7343 (D) Sanyo 10TPB100M 1 C3 Capacitor, ceramic, 2.2 µF, 6.3 V, X5R, 10% 805 Murata GRM21BR60J225KC01 1 C4 Capacitor, ceramic, 10 µF, 6.
