Datasheet

       
       
    
SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
www.ti.com
16
APPLICATION INFORMATION
external capacitor requirements (continued)
RESET/
PG
OUT
OUT
7
6
5
IN
IN
EN
GND
3
16
14
13
V
I
C1
0.1 µF
RESET
/PG
V
O
10 µF
+
C
o
250 k
Figure 25. Typical Application Circuit (Fixed Versions)
programming the TPS77x01 adjustable LDO regulator
The output voltage of the TPS77x01 adjustable regulator is programmed using an external resistor divider as shown in
Figure 26. The output voltage is calculated using:
V
O
+ V
ref
ǒ
1 )
R1
R2
Ǔ
(
1)
Where:
V
ref
= 1.1834 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 10-µA divider current. Lower value resistors can be used but offer
no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the
output voltage error. The recommended design procedure is to choose R2 = 110 k to set the divider current at
approximately 10 µA and then calculate R1 using:
R1 + ǒ
V
O
V
ref
* 1Ǔ R2
(2)
OUTPUT
VOLTAGE
R1 R2
2.5 V
3.3 V
3.6 V
4.75 V
UNIT
121
196
226
332
110
110
110
110
k
k
k
k
OUTPUT VOLTAGE
PROGRAMMING GUIDE
V
O
V
I
RESET
/
PG
OUT
FB / NC
R1
R2
GND
EN
IN
0.9 V
1.7 V
TPS77x01
Reset or PG Output
0.1 µF
250 k
C
o
Figure 26. TPS77x01 Adjustable LDO Regulator Programming