Datasheet

OUT
IN
FB
GND
EN
V
REF
Current Limit
TPS76901-EP
SLVSA53A –NOVEMBER 2009–REVISED DECEMBER 2009 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
T
A
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
–55°C to 150°C DBV TPS76901SDBVTEP PCFS
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTIONAL BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
VALUE UNIT
V
REF
Input voltage range
(2)
–0.3 to 13.5 V
Voltage range at EN –0.3 to V
I
+ 0.3 V
Voltage on OUT, FB 7 V
Peak output current Internally limited
ESD rating, HBM 2 kV
Continuous total power dissipation See Dissipation Ratings Table
T
J
Operating virtual junction temperature range –55 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
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Product Folder Link(s): TPS76901-EP