Datasheet
a
b
c
d
Origin
TPS76901-HT
SLVS959D –JUNE 2009–REVISED NOVEMBER 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
BARE DIE INFORMATION
BACKSIDE BOND PAD
DIE THICKNESS BACKSIDE FINISH
POTENTIAL METALLIZATION COMPOSITION
15 mils. Silicon with backgrind GND Al-Si-Cu (0.5%)
Table 1. BOND PAD COORDINATES
DESCRIPTION
(1)
PAD NUMBER a b c d
IN 1 91.55 764.45 176.55 849.45
OUT 2 130.10 91.50 215.10 176.50
DNC 3 177.10 91.50 253.10 176.50
FB 4 1130.75 91.50 1215.75 176.50
DNC 5 1180.00 229.00 1256.00 305.00
DNC 6 1180.00 330.00 1256.00 406.00
DNC 7 1180.00 431.00 1256.00 507.00
DNC 8 1180.00 532.00 1256.00 608.00
DNC 9 1180.00 633.00 1256.00 709.00
DNC 10 1180.00 734.00 1256.00 810.00
EN 11 1058.50 864.50 1143.50 949.50
GND 12 700.00 881.00 785.00 966.00
IN 13 202.50 864.50 287.50 949.50
(1) DNC = Do not connect
2 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: TPS76901-HT