Datasheet

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REGULATOR PROTECTION
POWER DISSIPATION AND JUNCTION TEMPERATURE
P
D
max 
T
J
max  T
A
R
JA
(3)
P
D


V
I
 V
O

 I
O
(4)
TPS768xxQ
SLVS211L – JUNE 1999 – REVISED JANUARY 2006
APPLICATION INFORMATION (continued)
The TPS768xxQ PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (for example, during power-down). Current is conducted from the output
to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS768xxQ also features internal current limiting and thermal protection. During normal operation, the
TPS768xxQ limits output current to approximately 1.7 A. When current limiting engages, the output voltage
scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross
device failure, care should be taken not to exceed the power dissipation ratings of the package. If the
temperature of the device exceeds +150 ° C (typ), thermal-protection circuitry shuts it down. Once the device has
cooled below +130 ° C (typ), regulator operation resumes.
Specified regulator operation is assured to a junction temperature of +125 ° C; the maximum junction temperature
should be restricted to +125 ° C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
D
max, and the actual dissipation, P
D
, which must be less than or
equal to P
D
max.
The maximum-power-dissipation limit is determined using the following equation:
Where:
• T
J
max is the maximum allowable junction temperature.
• R
θ JA
is the thermal resistance junction-to-ambient for the package; that is, 172 ° C/W for the 8-pin SOIC (D)
and 32.6 ° C/W for the 20-pin TSSOP (PWP) with no airflow.
• T
A
is the ambient temperature.
The regulator dissipation is calculated using:
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
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