Datasheet

TPS76815-Q1, TPS76818-Q1, TPS76825-Q1, TPS76827-Q1
TPS76828-Q1, TPS76830-Q1 TPS76833-Q1, TPS76850-Q1, TPS76801-Q1
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SGLS155A − FEBRUARY 2003 − REVISED SEPTEMBER 2008
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
external capacitor requirements (continued)
PG
OUT
OUT
7
6
5
IN
IN
EN
GND
3
16
14
13
V
I
C1
0.1 µF
PG
V
O
10 µF
+
TPS768xx
C
o
250 kΩ
Figure 26. Typical Application Circuit (Fixed Versions)
programming the TPS76801 adjustable LDO regulator
The output voltage of the TPS76801 adjustable regulator is programmed using an external resistor divider as
shown in Figure 27. The output voltage is calculated using:
V
O
+ V
ref
ǒ
1 )
R1
R2
Ǔ
(1
)
Where:
V
ref
= 1.1834 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 30.1 kΩ to set the divider current at 50 µA and then calculate R1 using:
R1 +
ǒ
V
O
V
ref
* 1Ǔ R2
(2)
OUTPUT
VOLTAGE
R1 R2
2.5 V
3.3 V
3.6 V
4.75 V
UNIT
33.2
53.6
61.9
90.8
30.1
30.1
30.1
30.1
kΩ
kΩ
kΩ
kΩ
OUTPUT VOLTAGE
PROGRAMMING GUIDE
V
O
V
I
PG
OUT
FB / NC
R1
R2
GND
EN
IN
≤ 0.9 V
≥ 1.7 V
TPS76801
PG
0.1 µF
250 kΩ
Figure 27. TPS76801 Adjustable LDO Regulator Programming