Datasheet
SLVS208I − MAY 1999 − REVISED JANUARY 2004
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17
APPLICATION INFORMATION
reset indicator
The TPS767xx features a RESET output that can be used to monitor the status of the regulator. The internal comparator
monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the RESET
output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left
floating. RESET
can be used to drive power-on reset circuitry or as a low-battery indicator. RESET does not assert itself
when the regulated output voltage falls outside the specified 2% tolerance, but instead reports an output voltage low relative
to its nominal regulated value (refer to timing diagram for start-up sequence).
regulator protection
The TPS767xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input voltage drops
below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally
limited. When extended reverse voltage is anticipated, external limiting may be appropriate.
The TPS767xx also features internal current limiting and thermal protection. During normal operation, the TPS767xx limits
output current to approximately 1.7 A. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to
exceed the power dissipation ratings of the package. If the temperature of the device exceeds 150°C(typ),
thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ), regulator operation resumes.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be
restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle
in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable
dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than or equal to P
D(max)
.
The maximum-power-dissipation limit is determined using the following equation:
P
D(max)
+
T
J
max * T
A
R
θJA
Where:
T
J
max is the maximum allowable junction temperature.
T
A
is the ambient temperature.
R
θJA
is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal
SOIC and 32.6°C/W for the 20-terminal PWP with no airflow.
The regulator dissipation is calculated using:
P
D
+
ǒ
V
I
* V
O
Ǔ
I
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal
protection circuit.