Datasheet

   
    
    
SLVS208I − MAY 1999 − REVISED JANUARY 2004
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4
Terminal Functions
SOIC Package
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
EN 2 I Enable input
FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 1 Regulator ground
IN 3, 4 I Input voltage
OUT 5, 6 O Regulated output voltage
RESET 8 O RESET output
PWP Package
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
EN 5 I Enable input
FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 3 Regulator ground
GND/HSINK 1, 2, 9, 10, 11,
12, 19, 20
Ground/heatsink
IN 6, 7 I Input voltage
NC 4, 8, 17, 18 No connect
OUT 13, 14 O Regulated output voltage
RESET 16 O RESET output
timing diagram
(1)
V
res
is the minimum input voltage for a valid RESET
. The symbol V
res
is not currently listed within EIA or JEDEC standards for
semiconductor symbology.
V
I
V
res
(1)
V
res
t
t
t
V
O
Threshold
Voltage
RESET
Output
200 ms
Delay
200 ms
Delay
Output
Undefined
Output
Undefined
V
IT+
(2)
V
IT−
(2)
V
IT−
(2)
V
IT+
(2)
Less than 5% of the
output voltage
(2)
V
IT
−Trip voltage is typically 5% lower than the output voltage (95%V
O
) V
IT−
to V
IT+
is the hysteresis voltage.