Datasheet

APPLICATION INFORMATION
DEVICE OPERATION
MINIMUM LOAD REQUIREMENTS
FB — PIN CONNECTION (ADJUSTABLE VERSION ONLY)
EXTERNAL CAPACITOR REQUIREMENTS
TPS76615 , , TPS76618 , , TPS76625
TPS76627 , TPS76628 , TPS76630
TPS76633 , TPS76650 , TPS76601
SLVS237C – AUGUST 1999 – REVISED JANUARY 2009 ................................................................................................................................................. www.ti.com
The TPS766xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V,
3.3 V, and 5.0 V), and an adjustable regulator, the TPS76601 (adjustable from 1.25 V to 5.5 V).
The TPS766xx features very low quiescent current that remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the
load current through the regulator (I
B
= I
C
/ β ). The TPS766xx uses a PMOS transistor to pass current; because
the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in I
B
to maintain the load. During power up, this increase in I
B
translates to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered
systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation.
The TPS766xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS766xx family also features a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 1 µ A (typ). If the
shutdown feature is not used, EN should be tied to ground. Response to an enable transition is quick; regulated
output voltage is reestablished in typically 160 µ s.
The TPS766xx family is stable even at zero load; no minimum load is required for operation.
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The output
voltage is sensed through a resistor divider network to close the loop as shown in Figure 29 . Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance, wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize or avoid noise pickup
is essential.
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µ F or larger) improves
load transient response and noise rejection if the TPS766xx is located more than a few inches from the power
supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load
transients with fast rise times are anticipated.
Like most low dropout regulators, the TPS766xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance value is 4.7 µ F and the ESR
(equivalent series resistance) must be between 300 mW and 20 Ω . Capacitor values 4.7 µ F or larger are
acceptable, provided the ESR is less than 20 Ω . Solid tantalum electrolytic and aluminum electrolytic capacitors
are all suitable, provided they meet the requirements described previously. Ceramic capacitors, with series
resistors that are sized to meet the previously described requirements, may also be used.
14 Submit Documentation Feedback Copyright © 1999 – 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS76615 TPS76618 TPS76625 TPS76627 TPS76628 TPS76630 TPS76633 TPS76650
TPS76601