Datasheet

TPS76515, TPS76518, TPS76525, TPS76527
TPS76528, TPS76530, TPS76533, TPS76550, TPS76501
ULTRA-LOW QUIESCIENT CURRENT 150-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS236 – AUGUST 1999
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
power-good indicator
The TPS765xx features a power-good (PG) output that can be used to monitor the status of the regulator. The
internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup
resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a
low-battery indicator.
regulator protection
The TPS765xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS765xx also features internal current limiting and thermal protection. During normal operation, the
TPS765xx limits output current to approximately 0.8 A. When current limiting engages, the output voltage scales
back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device
failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of
the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below
130°C(typ), regulator operation resumes.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than
or equal to P
D(max)
.
The maximum-power-dissipation limit is determined using the following equation:
P
D(max)
T
J
max T
A
R
JA
Where
T
J
max is the maximum allowable junction temperature
T
A
is the ambient temperature.
R
θJA
is the thermal resistance junction-to-ambient for the package, i.e., 176°C/W for the 8-terminal
SOIC.
The regulator dissipation is calculated using:
P
D
V
I
V
O
I
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.