Datasheet
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DESCRIPTION, CONTINUED
ABSOLUTE MAXIMUM RATINGS
(1)
TPS752xxQ
TPS754xxQ
SLVS242C – MARCH 2000 – REVISED OCTOBER 2007
The RESET (SVS, POR, or power on reset) output of the TPS752xxQ initiates a reset in microcomputer and
microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xxQ
monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.
When the output reaches 95% of its regulated voltage, RESET goes to a high-impedance state after a 100-ms
delay. RESET goes to a logic-low state when the regulated output voltage is pulled below 95% (that is, during an
overload condition) of its regulated voltage.
The TPS754xxQ has a power good terminal (PG) as an active high, open drain output for use with a power-on
reset or a low-battery indicator.
The TPS754xxQ and TPS752xxQ are offered in 1.5 V, 1.8 V, 2.5 V and 3.3 V fixed-voltage versions and in an
adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a
maximum of 2% over line, load, and temperature ranges. The TPS754xxQ and TPS752xxQ families are
available in a 20-pin TSSOP (PWP) package.
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
(2)
TPS752 xxyyyz, TPS754 xxyyyz XX is nominal output voltage (for example, 15 = 1.5 V, 01 = Adjustable
(3)
).
YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
(2) Custom fixed output voltages are available; minimum order quantities may apply. Contact factory for details and availability.
(3) The TPS75x01 is programmable using an external resistor divider (see Application Information ).
Over operating temperature range (unless otherwise noted).
PARAMETER TPS752xxQ, TPS754xxQ UNIT
Input voltage range, V
IN
(2)
– 0.3 to +6 V
Voltage range at EN – 0.3 to +16.5 V
Maximum RESET voltage (TPS752xxQ) 16.5 V
Maximum PG voltage (TPS754xxQ) 16.5 V
Peak output current Internally limited
Output voltage range at OUT, FB 5.5 V
Continuous total power dissipation See Dissipation Ratings Table
Operating virtual junction temperature range, T
J
– 40 to +125 ° C
Storage junction temperature range , T
STG
– 65 to +150 ° C
ESD rating, HBM 2 kV
(1) Stresses above these ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended
periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those specified is not implied.
(2) All voltages are with respect to network terminal ground.
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