Datasheet

0
1
2
3
4
5
6
Time
Voltage (V)
EN
OUT1
OUT2
PG
G000
0
1
2
3
4
5
6
Time
Voltage (V)
EN
OUT1
OUT2
PG
G000
TPS75005
SBVS144C –NOVEMBER 2011–REVISED APRIL 2012 www.ti.com
SEQUENCER BLOCK
The TPS75005 integrates a sequencer logic circuit to control the power-up and power-down sequences of the
two output voltage rails (V
DD
and V
DDIO
) for C2000 controllers.
Application Report SBVA031, TPS75005 Advanced Information: Sequencer and State Machine, explains a state
machine of this sequencer logic in detail.
C2000 Power Sequencing
Depending on the C2000 controller series, the required power-up and power-down order of V
DD
and V
DDIO
can
be different, as shown in Table 1. Figure 30 and Figure 31 shows the typical waveforms of two different
sequencing cycles set by the SEQ pin.
Table 1. Required Power-Up and Power-Down Sequence of C2000 Controllers
POWER-UP ORDER POWER-DOWN ORDER
C2000 1ST CHANNEL 2ND CHANNEL 1ST CHANNEL 2ND CHANNEL TPS75005 TYPICAL
CONTROLLER TURNED ON TURNED ON TURNED OFF TURNED OFF SEQ SETTING WAVEFORM
F280x/F2801x V
DD
V
DDIO
V
DDIO
V
DD
Logic-L Figure 30
F281x V
DDIO
V
DD
V
DD
V
DDIO
Logic-H Figure 31
F2823x V
DD
V
DDIO
V
DDIO
V
DD
Logic-L Figure 30
F2833X V
DD
V
DDIO
V
DDIO
V
DD
Logic-L Figure 30
Figure 30. Power Sequence with SEQ = L Figure 31. Power Sequence with SEQ = H
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