Datasheet
P
D
+
ǒ
V
IN3
*V
OUT3
Ǔ
I
OUT3
L1
IN3
OUT3
FB1
FB2
20
1
11
10
DGND
SS3
AGND
EN1
SS1
DGND
SW1
IN1
IS1
19
18
17
16
15
14
13
12
FB3
EN3
EN2
SS2
DGND
SW2
IN2
IS2
2
3
4
5
6
7
8
9
R6
R7
EN3
EN2
V
IN
EN1
V
IN
C5,
C18
C3,
C17
C7
R5
C10
C12, C16
C13, C15
Q1
Q2
L2
V
OUT1
D2
C9
C6
V
OUT3
C14
C8
R9
D1
R8
V
OUT2
R4
C1
V
IN
TPS75003
SBVS052I –OCTOBER 2004–REVISED AUGUST 2010
www.ti.com
Power Dissipation (LDO)
The TPS75003 comes in a QFN-style package with an exposed lead frame on the package underside. The
exposed lead frame is the primary path for removing heat and should be soldered to a PC board that is
configured to remove the amount of power dissipated by the LDO, as calculated by Equation 17:
(17)
Power dissipation can be minimized by using the lowest possible input voltage necessary to assure the required
output voltage. The two buck converters do not contribute a significant amount of dissipated power. Using
heavier copper will increase the overall effectiveness of removing heat from the device. The addition of plated
through-holes to heat-dissipating layers will also improve the heatsink effectiveness.
PCB Layout Considerations
As with any switching regulators, careful attention must be paid to board layout. A typical application circuit and
corresponding recommended printed circuit board (PCB) layout with emphasis on the most sensitive areas are
shown in Figure 26 through Figure 28.
Note: Most sensitive areas are highlighted by bold lines.
Figure 26. Typical Application Circuit
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Product Folder Link(s): TPS75003