Datasheet

TPS75003
SBVS052I –OCTOBER 2004–REVISED AUGUST 2010 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
Buck1: Adjustable
TPS75003 Buck2: Adjustable
LDO: Adjustable
(1) For the most current specifications and package information, see the Package Option Addendum located at the end of this document, or
see the TI website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range (unless otherwise noted)
(1)
TPS75003 UNIT
V
INX
range (IN1, IN2, IN3) –0.3 to +7.0 V
V
ENX
range (EN1, EN2, EN3) –0.3 to V
INX
+0.3 V
V
SWX
range (SW1, SW2, SW3) –0.3 to V
INX
+0.3 V
V
ISX
range (IS1, IS2, IS3) –0.3 to V
INX
+0.3 V
V
OUT3
range –0.3 to +7.0 V
V
SSX
range (SS1, SS2, SS3) –0.3 to V
INX
+0.3 V
V
FBX
range (FB1, FB2, FB3) –0.3 to +3.3 V
Peak LDO output current (I
OUT3
) Internally limited —
Continuous total power dissipation See Dissipation Ratings Table —
Junction temperature range, T
J
–55 to +150 °C
Storage temperature range –65 to +150 °C
ESD rating, HBM 1 kV
ESD rating, CDM 500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics
is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
TPS75003
THERMAL METRIC
(1)(2)
UNITS
RHL (20 PINS)
q
JA
Junction-to-ambient thermal resistance 42.6
q
JCtop
Junction-to-case (top) thermal resistance 51.8
q
JB
Junction-to-board thermal resistance 39.5
°C/W
y
JT
Junction-to-top characterization parameter 0.6
y
JB
Junction-to-board characterization parameter 14.2
q
JCbot
Junction-to-case (bottom) thermal resistance 2.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
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