Datasheet

I
C,IN(RMS)
[ I
OUT
ǒ
V
OUT
V
IN,
MIN
Ǔ
Ǹ
V
IN
*V
OUT
*I
OUT
r
DS(on)
*R
L
I
OUT
w
t
(OFF,min)
ǒ
V
OUT
)V
SCHOTTKY
)R
L
I
OUT
Ǔ
t
ON,
MIN
L
MIN
+
ǒ
V
IN
*V
OUT
*I
OUT
r
DS(on)
*R
L
I
OUT
Ǔ
t
ON,
MIN
DI
L
L
MIN
+
ǒ
V
OUT
)V
SCHOTTKY
)R
L
I
OUT
Ǔ
t
OFF,
MIN
DI
L
I
PMOS(RMS)
[ I
OUT
D
Ǹ
+ I
OUT
V
OUT
V
IN
Ǹ
P
(cond)
+
ǒ
I
OUT
D
Ǹ
Ǔ
2
r
DS(on)
ǒ
1)TC
ƪ
T
J
*25°C
ƫ
Ǔ
[
ǒ
I
OUT
D
Ǹ
Ǔ
r
DS(on)
TPS75003
SBVS052I –OCTOBER 2004–REVISED AUGUST 2010 www.ti.com
Note that the capacitors must be able to handle the RMS current in continuous conduction mode, which can be
calculated using Equation 4:
(4)
Inductor Value Selection (Buck Controllers)
The inductor is chosen based on inductance value and maximum current rating. Larger inductors reduce current
ripple (and therefore, output voltage ripple) but are physically larger and more expensive. Inductors with lower
DC resistance typically improve efficiency, but also have higher cost and larger physical size. The buck
converters work well with inductor values between 4.7mH and 47mH in most applications. When selecting an
inductor, the current rating should exceed the current limit set by R
IS
or R
DS,ON
(see the Current Limit section). To
determine the minimum inductor size, first determine if the device will operate in minimum on-time or minimum
off-time mode. The device will operate in minimum on-time mode if Equation 5 is satisfied:
(5)
where R
L
= the inductor DC resistance.
Minimum inductor size needed when operating in minimum on-time mode is given by Equation 6:
(6)
Minimum inductor size needed when operating in minimum off-time mode is given by Equation 7:
(7)
where ΔI
L
= (20%–30%) x I
OUT-MAX
External PMOS Transistor Selection (Buck Controllers)
The external PMOS transistor is selected based on threshold voltage (V
T
), on-resistance (R
DS,ON
), gate
capacitance (C
G
) and voltage rating. The PMOS V
T
magnitude must be much lower than the lowest voltage at
IN1 or IN2 that will be used. A V
T
magnitude that is 0.5V less than the lowest input voltage is normally sufficient.
The PMOS gate will see voltages from 0V to the maximum input voltage, so gate-to-source breakdown should be
a few volts higher than the maximum input supply. The drain-to-source of the device will also see this full voltage
swing, and should therefore be a few volts higher than the maximum input supply. The RMS current in the PMOS
can be estimated by using Equation 8:
(8)
The power dissipated in the PMOS is comprised of both conduction and switching losses. Switching losses are
typically insignificant. The conduction losses are a function of the RMS current and the R
DS,ON
of the PMOS, and
are calculated by Equation 9:
(9)
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