Datasheet

( )

D IN3 OUT3 O UT 3

P = V V I- ´

SS3

AGND

EN1

SS1

SW1

IN1

IS1

DGND

FB3

EN3

EN2

SS2

DGND

SW2

IN2

IS2

TPS75003-EP

SGLS311A –DECEMBER 2006– REVISED MARCH 2011

www.ti.com

Power Dissipation (LDO)

The TPS75003 comes in a QFN-style package with an exposed lead frame on the package underside. The

exposed lead frame is the primary path for removing heat and should be soldered to a PC board that is

configured to remove the amount of power dissipated by the LDO, as calculated by Equation 15.

(15)

Power dissipation can be minimized by using the lowest possible input voltage necessary to assure the required

output voltage. The two buck converters do not contribute a significant amount of dissipated power. Using

heavier copper increases the overall effectiveness of removing heat from the device. The addition of plated

through-holes to heat-dissipating layers also improves the heatsink effectiveness.

PCB Layout Considerations

As with any switching regulators, careful attention must be paid to board layout. A typical application circuit and

corresponding recommended printed circuit board (PCB) layout with emphasis on the most sensitive areas are

shown in Figure 26 through Figure 28.

Note: Most sensitive areas are highlighted by bold lines.

Figure 26. Typical Application Circuit

Product Folder Link(s): TPS75003-EP