Datasheet

Reference
SimplifiedBlock Diagram
V
OUT
OUT
BIAS
FB
IN
V =5V 5%
BIAS
±
V =1.8V
V =1.5V
I =1.5A
Efficiency=83%
IN
OUT
OUT
C
OUT
t =
SS
(V C )´
REF SS
I
SS
t =
SSCL
(V C )´
OUT(NOM) OUT
I
CL(MIN)
Reference
SimplifiedBlock Diagram
V
OUT
OUT
BIAS
FB
IN
V
IN
V =3.3V 5%
BIAS
±
V =3.3V 5V
V =1.5V
I =1.5A
Efficiency=45%
IN
OUT
OUT
±
C
OUT
TPS74801
SBVS074J JANUARY 2007 REVISED JANUARY 2012
www.ti.com
DROPOUT VOLTAGE The second specification (shown in Figure 27) is
referred to as V
BIAS
Dropout and applies to
The TPS74801 offers very low dropout performance,
applications where IN and BIAS are tied together.
making it well-suited for high-current, low V
IN
/low
This option allows the device to be used in
V
OUT
applications. The low dropout of the TPS74801
applications where an auxiliary bias voltage is not
allows the device to be used in place of a dc/dc
available or low dropout is not required. Dropout is
converter and still achieve good efficiency. This
limited by BIAS in these applications because V
BIAS
provides designers with the power architecture for
provides the gate drive to the pass FET; therefore,
their application to achieve the smallest, simplest,
V
BIAS
must be 1.6V above V
OUT
. Because of this
and lowest cost solution.
usage, IN and BIAS tied together easily consume
huge power. Pay attention not to exceed the power
There are two different specifications for dropout
rating of the IC package.
voltage with the TPS74801. The first specification
(shown in Figure 26) is referred to as V
IN
Dropout and
is used when an external bias voltage is applied to PROGRAMMABLE SOFT-START
achieve low dropout. This specification assumes that
The TPS74801 features a programmable, monotonic,
V
BIAS
is at least 3.25V
(1)
above V
OUT
, which is the
voltage-controlled soft-start that is set with an
case for V
BIAS
when powered by a 5.0V rail with 5%
external capacitor (C
SS
). This feature is important for
tolerance and with V
OUT
= 1.5V. If V
BIAS
is higher than
many applications because it eliminates power-up
V
OUT
+3.25V
(1)
, V
IN
dropout is less than specified.
initialization problems when powering FPGAs, DSPs,
or other processors. The controlled voltage ramp of
the output also reduces peak inrush current during
start-up, minimizing start-up transient events to the
input power bus.
To achieve a linear and monotonic soft-start, the
TPS74801 error amplifier tracks the voltage ramp of
the external soft-start capacitor until the voltage
exceeds the internal reference. The soft-start ramp
time depends on the soft-start charging current (I
SS
),
soft-start capacitance (C
SS
), and the internal
reference voltage (V
REF
), and can be calculated using
Equation 1:
(1)
Figure 26. Typical Application of the TPS74801
Using an Auxiliary Bias Rail
If large output capacitors are used, the device current
limit (I
CL
) and the output capacitor may set the
start-up time. In this case, the start-up time is given
by Equation 2:
(2)
where:
V
OUT(NOM)
is the nominal output voltage,
C
OUT
is the output capacitance, and
I
CL(MIN)
is the minimum current limit for the device.
In applications where monotonic startup is required,
the soft-start time given by Equation 1 should be set
greater than Equation 2.
The maximum recommended soft-start capacitor is
0.015μF. Larger soft-start capacitors can be used and
Figure 27. Typical Application of the TPS74801
do not damage the device; however, the soft-start
Without an Auxiliary Bias Rail
capacitor discharge circuit may not be able to fully
discharge the soft-start capacitor when enabled.
Soft-start capacitors larger than 0.015μF could be a
(1) 3.25V is a test condition of this device and can be adjusted by
problem in applications where it is necessary to
referring to Figure 8.
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